A novel digital processor architecture with inherent memory via reversible logic gates and a QCA

Reversible logic technology has the most promising role in quantum computing. With the evolution of high-performance computing devices, future processors are focusing on quantum technology for their development and fabrication. This work focuses on the development of a novel digital processor with memory via parity-preserving reversible logic gates and quantum cellular automaton (QCA). The design and realization of the integral components of the digital processor have been performed with reversible KMD gates. The processor’s main modules include the ALU, multipliers, floating-point division unit, control unit, and memory unit. It has a control unit to monitor and control the operation of the processor. The QCA design of individual modules of the developed processor is carried out with appropriate multilayer wire crossing. The performances of the individual models of the processor are compared and analyzed with those of existing designs. The reversible processor has 891 quantum costs, 141 constant inputs, and 188 garbage outputs; it needs 120 reversible gates and 1397 total costs. The results show that the developed processor modules are better than the existing modules, as the appropriate use of reversible logic gates for modern-day high-performance, economical and low-power-consumption processors.